[{"country_short": "USA", "city": "Austin", "description": "Auto req ID 18843BR\nJob Posting Title Principal CPU Testbench Verification Engineer- Multi-Core Processor\nBusiness Unit Infrastructure and Networking\nJob Description The successful candidate will be a well-rounded verification engineer while directly responsible for all aspects of functional verification testbench in a high-performance, multi-threaded CPU in a multi-core network processor SoC.\n\nResponsibilities:\n\n\u2022 Define/setup/develop infrastructure and testbench for the verification of a high performance CPU at a core level.\n\u2022 Work closely with architects/RTL engineers to bring up a new architecture/micro-architecture on the verification environment.\n\u2022 Develop and maintain monitors, bus functional models and scripts used in the verification of a CPU.\n\u2022 Work closely and support with other engineers for unit testbench development, execution, and debug.\n\u2022 Own and debug failures in simulation to root-cause problems.\nJob Requirements \u2022  BS (EE or CS) required with 10-16 years relevant experience. Master\u2019s level preferred\n\u2022  Strong programming background on C++ and/or System Verilog.\n\u2022  Strong verification skills including a good knowledge of different methodologies such as:\no Architecture versus Micro-architecture level\no Random versus Directed testing\no Full-chip versus Module-level\n\n\u2022  Good CPU architecture/micro-architecture knowledge:\no MIPS, PowerPC, ARM, x86 or SPARC architectures\no CPU pipeline\no  Out-of-order execution, superscalar and caches\n\n\u2022  Working knowledge and experience on Verilog\n\u2022 Familiarity with a current verification methodology such as UVM, OVM, VMM.\n\u2022 Worked through tapeout on verifying a complex high-performance CPU on at least one project.\n\u2022 Knowledge of Unix/Linux environment and scripting (perl/python).\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required None\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-04-03 21:54:24", "url": "http://broadcom.jobs/xml/27618444/job", "country": "United States", "company": "Broadcom", "title": "Principal CPU Testbench Verification Engineer- Multi-Core Processor", "reqid": "18843BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 27618444}, {"country_short": "USA", "city": "Austin", "description": "Auto req ID 18182BR\nJob Posting Title Principal Physical Design Engineer\nBusiness Unit Central Engineering\nJob Description As an IC Physical Design Engineer, you will be responsible for 65nm/40nm/28nm physical digital design implementation. You will also contribute in physical design of the IPs in the beginning and chip level physical design at a later time.\n\nResponsibility includes owning and implementing the backend flow by going through the various stages of RTL2GDSII scheme that includes floor planning, clock tree synthesis, routing, power routing reliability, signal integrity analysis, static timing analysis, IR/EM analysis, physical verification (DRC/LVS/ERC/ANT). Additional experience in synthesis, formal verification signoff STA or DFT is a plus.\nJob Requirements - BSEE with more than 9+ years, or MSEE with more than 12+ years\n- Experience in physical design.\n- Expert user in Atoptech or another major PNR tool(such as Magma or ICC), Mentor Calibre and\nSynopsys Primetime.\n- Programming skill using Perl or Tcl is required.\n- Strong analytical, and problem solving skills.\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline Electronic Design", "date_new": "2012-03-12 19:15:25", "url": "http://broadcom.jobs/xml/27085159/job", "country": "United States", "company": "Broadcom", "title": "Principal Physical Design Engineer", "reqid": "18182BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 27085159}, {"country_short": "USA", "city": "Austin", "description": "Auto req ID 18210BR\nJob Posting Title Sr Staff IC Design Verification for Mobile Platforms (All levels)\nBusiness Unit Mobile and Wireless Group\nJob Description Broadcom is developing the next generation handheld devices with integrated cellular phone, digital camera, video camcorder and television capability using Broadcom's family of mobile multimedia processors. Broadcom's mobile multimedia processors offer high-performance programmable multimedia capability with minimum power consumption and are designed to support the convergence of voice, video and data in handheld devices.\n\nOur design verification team supports multiple lines of products within the Mobile Platform Solutions Business Unit.\n\nYour responsibility will include:\n- Developing functional verification testplan\n- Developing verification environment and test suites for full chip and block level\n- Work closely with RTL designer as well as software and hardware engineers (such as FPGA team) to port test to/from other environment\n- Assist in functional test vector generation and bring up on ATE\n- Assist in silicon bring up\nJob Requirements - BSEE with 9+ years related experience, MSEE with 6+ years related experience, PhD with 3+ years related experience\n- Experience in verifying designs at system and block level\n- Strong verilog, PERL, TCL, C/C++ programming skills\n- Experience in System Verilog is a plus\n- Experience with VMM/OVM/UVM is a plus\n- Experience with ARM architecture is a plus\n- Must be able to multitask, self motivated, detail oriented\n- Must have an excellent communication and a team player\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-03-06 20:46:13", "url": "http://broadcom.jobs/xml/26961384/job", "country": "United States", "company": "Broadcom", "title": "Sr Staff IC Design Verification for Mobile Platforms (All levels)", "reqid": "18210BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 26961384}, {"country_short": "USA", "city": "Austin", "description": "Auto req ID 18212BR\nJob Posting Title IC Design Verification for Mobile Platforms (all levels)\nBusiness Unit Mobile and Wireless Group\nJob Description Broadcom is developing the next generation handheld devices with integrated cellular phone, digital camera, video camcorder and television capability using Broadcom's family of mobile multimedia processors. Broadcom's mobile multimedia processors offer high-performance programmable multimedia capability with minimum power consumption and are designed to support the convergence of voice, video and data in handheld devices.\n\nOur design verification team supports multiple lines of products within the Mobile Platform Solutions Business Unit.\n\nYour responsibility will include:\n- Developing functional verification testplan\n- Developing verification environment and test suites for full chip and block level\n- Work closely with RTL designer as well as software and hardware engineers (such as FPGA team) to port test to/from other environment\n- Assist in functional test vector generation and bring up on ATE\n- Assist in silicon bring up\n\n- BSEE with 12+ years related experience, MSEE with 9+ years related experience, or PhD with 6+ years related experience\n- Experience in verifying designs at system and block level\n- Strong verilog, PERL, TCL, C/C++ programming skills\n- Experience in System Verilog is a plus\n- Experience with VMM/OVM/UVM is a plus\n- Experience with ARM architecture is a plus\n- Must be able to multitask, self motivated, detail oriented\n- Must have an excellent communication and a team player\nJob Requirements - BSEE with 12+ years related experience, MSEE with 9+ years related experience, or PhD with 6+ years related experience\n- Experience in verifying designs at system and block level\n- Strong verilog, PERL, TCL, C/C++ programming skills\n- Experience in System Verilog is a plus\n- Experience with VMM/OVM/UVM is a plus\n- Experience with ARM architecture is a plus\n- Must be able to multitask, self motivated, detail oriented\n- Must have an excellent communication and a team player\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-03-06 20:43:11", "url": "http://broadcom.jobs/xml/26961269/job", "country": "United States", "company": "Broadcom", "title": "IC Design Verification for Mobile Platforms (all levels)", "reqid": "18212BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 26961269}, {"country_short": "USA", "city": "Austin", "description": "Auto req ID 18214BR\nJob Posting Title IC Design Verification (All Levels)\nBusiness Unit Mobile and Wireless Group\nJob Description Broadcom is developing the next generation handheld devices with integrated cellular phone, digital camera, video camcorder and television capability using Broadcom's family of mobile multimedia processors. Broadcom's mobile multimedia processors offer high-performance programmable multimedia capability with minimum power consumption and are designed to support the convergence of voice, video and data in handheld devices. In this role you will:\n- Develop functional test/verification plans for mobile multimedia SOC devices.\n- Develop a verification environment and self-checking test suites for full chip and block level.\n- Devices include such functionality as embedded ARM, video, and 3D rendering cores, wireless networking technologies, and assorted peripherals.\n- Responsible for ASIC test vectors generation and debugging.\n- Work with system and hardware engineers to port the tests to other environments (such as FPGA prototyping systems), silicon bring up and validation, etc.\nJob Requirements Typically requires a BS degree and 3 years of experience plus training or an MS degree plus required training.\n\n- Experience in SOC verification.\n- Experience in verifying designs from system and block level.\n- Experience with either ARM (preferred) or MIPS embedded architectures.\n- Strong Verilog/Vhdl, C/C++, Vera/Specman, PERL, TCL programming skills.\n- SystemC, System Verilog or assertion based verification background a plus.\n- Strong system and block level reference modeling skill.\n- Excellent communication and presentation skills.\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-03-06 20:42:57", "url": "http://broadcom.jobs/xml/26961261/job", "country": "United States", "company": "Broadcom", "title": "IC Design Verification (All Levels)", "reqid": "18214BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 26961261}, {"country_short": "USA", "city": "Austin", "description": "Auto req ID 17243BR\nJob Posting Title Engineer, Principal - IC Design\nBusiness Unit Infrastructure and Networking\nJob Description This position is for DV of a very high end state of the art Optical Ethernet physical layer Serdes cores and\nother networking protocol cores. In this position you will contribute to\n\u2022 Play a lead role and be responsible for defining the verification strategy and plan for the development.\n\u2022 Develop and execute coverage-driven verification test plans.\n\u2022 Develop test suites for full chip and block level verification.\n\u2022 Develop System Verilog test bench environment.\n\u2022 Leverage your knowledge of constrained assertion based verification.\n\u2022 Manage the regressions and analyze functional and code coverage metrics to fill the coverage holes\n\u2022 Reviewing and critiquing of peers verification plan & env.\n\u2022 Develop a vector matching and/or co-simulation environment to verify between C/C++ models and RTL modules.\n\u2022 Add automation and scripting wherever applicable in the chip design flow\n\u2022 Proactively identifying new methodologies or tools to address an upcoming verification challenges\nJob Requirements \u2022 MSEE/BSEE with 10+ years in chip design verification.\n\u2022 Experience in verification lead position and be able to mentor highly qualified junior staff\n\u2022 Experience in planning the verification process and creating realistic schedule estimates\n\u2022 Experience in System Verilog.\n\u2022 Experience in scripting languages like PERL, TCL and C/C++ programming skills\n\u2022 Experience in developing coverage-driven verification test plans\n\u2022 Experience writing test specifications (plans) and creating directed and random test cases.\n\u2022 Experience in developing constrained random verification environment\n\u2022 Experience managing regression analysis\n\u2022 Experience in reviewing and critiquing of test bench and test plans\n\u2022 Strong debugging skills of Verilog RTL & test environment is desired\n\u2022 Able to adopt the use of new techniques and methodologies and promote their use within the project.\n\u2022 A high level of pro-activity, self-organized and problem solving.\n\u2022 Familiarity with assertion based verification is preferred\n\u2022 Verification experience in SERDES, Ethernet Networking in Verilog is a big plus.\n\u2022 Knowledge of IEEE 802.3 Physical layer clauses is a plus.\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2011-12-23 00:26:37", "url": "http://broadcom.jobs/xml/25532612/job", "country": "United States", "company": "Broadcom", "title": "Engineer, Principal - IC Design", "reqid": "17243BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 25532612}, {"country_short": "USA", "city": "Austin", "description": "Auto req ID 14159BR\nJob Posting Title IC Design Verification Engineer - All Levels (Austin, TX)\nBusiness Unit Mobile and Wireless Group\nJob Description Our chip team designs giant mobile apps processor SOC's for smartphones, tablets, and the mobile computing market. In 2011, Broadcom became the 5th largest mobile apps processor vendor, surpassing Nvidia. We expect to continue that trend up the rankings with your help!\n\nhttp://www.eetimes.com/electronics-news/4231160/Broadcom-slips-into-top-5-in-smartphone-CPUs\n\nOur group contains engineers with all the skills required to design a chip from spec through tapeout and bring-up. Our group has a start-up's excitement to it, with the stability of a world leading semiconductor company.\n\nOur latest chip contains dual 1.2GHz ARM CPU's + world leading multimedia + cellular modem + a multitude of other blocks/interfaces. With our next chip, we are aiming for the high end of the market, so come join us, and work on a really exciting chip!\n\nWe are currently hiring multiple ASIC design verification engineers. Strong domain knowledge in any of these areas is especially interesting to us:\n\nARM CPU's and interconnect, multiprocessor computer architecture, low power verification, DDR, security, multimedia, audio, as well as various high speed peripherals.\n\nJob Duties Include:\n\n- Developing functional test/verification plans\n- Developing advanced full chip and block level verification environments and benches using the latest tools and methodologies (UVM for example)\n- Execute on test plans by writing block level and top level tests\nJob Requirements Positions available from Staff to Senior Principal Engineer level. Title will vary based upon candidate's experience and abilities, with a BS/MS + 3 years of experience as the minimum required.\n\n- Experience in verifying ASIC designs at chip level and block level\n- Strong Verilog, Perl, and C/C++ programming skills\n- System Verilog (UVM preferred or VMM/OVM) experience\n- Experience with assertion based verification\n- Reference modeling skills\n- ARM embedded programming skills a big plus\n- Experience using Palladium systems is a plus\n- Excellent communication and presentation skills\n- Well organized, methodical, and detail oriented\n- Must be a team player and easy to work with\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required None\nFunction Engineering\nDiscipline IC Design", "date_new": "2011-06-06 20:05:49", "url": "http://broadcom.jobs/xml/21658707/job", "country": "United States", "company": "Broadcom", "title": "IC Design Verification Engineer - All Levels (Austin, TX)", "reqid": "14159BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 21658707}, {"country_short": "USA", "city": "Austin", "description": "Auto req ID 14162BR\nJob Posting Title IC Design Engineer - All Levels (Austin, TX)\nBusiness Unit Mobile and Wireless Group\nJob Description Our chip team designs giant mobile apps processor SOC's for smartphones, tablets, and the mobile computing market. In 2011, Broadcom became the 5th largest mobile apps processor vendor, surpassing Nvidia. We expect to continue that trend up the rankings with your help!\n\nhttp://www.eetimes.com/electronics-news/4231160/Broadcom-slips-into-top-5-in-smartphone-CPUs\n\nOur group contains engineers with all the skills required to design a chip from spec through tapeout and bring-up. Our group has a start-up's excitement to it, with the stability of a world leading semiconductor company.\n\nOur latest chip contains dual 1.2GHz ARM CPU's + world leading multimedia + cellular modem + a multitude of other blocks/interfaces. With our next chip, we are aiming for the high end of the market, so come join us, and work on a really exciting chip!\n\nWe are currently hiring multiple ASIC front end design engineers. Strong domain knowledge in any of these areas is especially interesting to us:\n\nARM CPU's and interconnect, multiprocessor computer architecture, low power design, DDR, security, multimedia, audio, as well as various high speed peripherals.\n\nJob Duties Include:\n\n- RTL Design (both from scratch, as well as integration)\n- Writing specifications for blocks\n- Working closely with DV engineers on the testing and debugging of your blocks\n- Designers often help out in other skill areas later in projects, so DV and/or implementation skills are a big plus\nJob Requirements Positions available from Staff to Senior Principal Engineer level. Title will vary based upon candidate's experience and abilities, with a BS/MS + 3 years of experience as the minimum required.\n\n- Extensive ASIC RTL design experience in Verilog\n- Technical knowledge in one of the domain areas mentioned above\n- Previous high end apps processor design experience a big plus\n- Excellent communication skills\n- Bright, well organized, methodical, team player, and detail oriented\nCountry United States\nState/Province Texas\nCity/Town Austin\nShift 1st Shift - Day\nPercent of Travel Required None\nFunction Engineering\nDiscipline IC Design", "date_new": "2011-05-12 21:33:56", "url": "http://broadcom.jobs/xml/21223349/job", "country": "United States", "company": "Broadcom", "title": "IC Design Engineer - All Levels (Austin, TX)", "reqid": "14162BR", "state": "Texas", "state_short": "TX", "location": "Austin, TX", "uid": 21223349}]