Broadcom Jobshttp://broadcom.jobs2012-05-21 11:17:07.639596USAAustinAuto req ID 18843BR Job Posting Title Principal CPU Testbench Verification Engineer- Multi-Core Processor Business Unit Infrastructure and Networking Job Description The successful candidate will be a well-rounded verification engineer while directly responsible for all aspects of functional verification testbench in a high-performance, multi-threaded CPU in a multi-core network processor SoC. Responsibilities: • Define/setup/develop infrastructure and testbench for the verification of a high performance CPU at a core level. • Work closely with architects/RTL engineers to bring up a new architecture/micro-architecture on the verification environment. • Develop and maintain monitors, bus functional models and scripts used in the verification of a CPU. • Work closely and support with other engineers for unit testbench development, execution, and debug. • Own and debug failures in simulation to root-cause problems. Job Requirements • BS (EE or CS) required with 10-16 years relevant experience. Master’s level preferred • Strong programming background on C++ and/or System Verilog. • Strong verification skills including a good knowledge of different methodologies such as: o Architecture versus Micro-architecture level o Random versus Directed testing o Full-chip versus Module-level • Good CPU architecture/micro-architecture knowledge: o MIPS, PowerPC, ARM, x86 or SPARC architectures o CPU pipeline o Out-of-order execution, superscalar and caches • Working knowledge and experience on Verilog • Familiarity with a current verification methodology such as UVM, OVM, VMM. • Worked through tapeout on verifying a complex high-performance CPU on at least one project. • Knowledge of Unix/Linux environment and scripting (perl/python). Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required None Function Engineering Discipline IC Design2012-04-03 21:54:24United StatesBroadcomTexas18843BRTXAustin, TX27618444http://broadcom.jobs/xml/27618444/jobUSAAustinAuto req ID 18182BR Job Posting Title Principal Physical Design Engineer Business Unit Central Engineering Job Description As an IC Physical Design Engineer, you will be responsible for 65nm/40nm/28nm physical digital design implementation. You will also contribute in physical design of the IPs in the beginning and chip level physical design at a later time. Responsibility includes owning and implementing the backend flow by going through the various stages of RTL2GDSII scheme that includes floor planning, clock tree synthesis, routing, power routing reliability, signal integrity analysis, static timing analysis, IR/EM analysis, physical verification (DRC/LVS/ERC/ANT). Additional experience in synthesis, formal verification signoff STA or DFT is a plus. Job Requirements - BSEE with more than 9+ years, or MSEE with more than 12+ years - Experience in physical design. - Expert user in Atoptech or another major PNR tool(such as Magma or ICC), Mentor Calibre and Synopsys Primetime. - Programming skill using Perl or Tcl is required. - Strong analytical, and problem solving skills. Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline Electronic Design2012-03-12 19:15:25United StatesBroadcomTexas18182BRTXAustin, TX27085159http://broadcom.jobs/xml/27085159/jobUSAAustinAuto req ID 18210BR Job Posting Title Sr Staff IC Design Verification for Mobile Platforms (All levels) Business Unit Mobile and Wireless Group Job Description Broadcom is developing the next generation handheld devices with integrated cellular phone, digital camera, video camcorder and television capability using Broadcom's family of mobile multimedia processors. Broadcom's mobile multimedia processors offer high-performance programmable multimedia capability with minimum power consumption and are designed to support the convergence of voice, video and data in handheld devices. Our design verification team supports multiple lines of products within the Mobile Platform Solutions Business Unit. Your responsibility will include: - Developing functional verification testplan - Developing verification environment and test suites for full chip and block level - Work closely with RTL designer as well as software and hardware engineers (such as FPGA team) to port test to/from other environment - Assist in functional test vector generation and bring up on ATE - Assist in silicon bring up Job Requirements - BSEE with 9+ years related experience, MSEE with 6+ years related experience, PhD with 3+ years related experience - Experience in verifying designs at system and block level - Strong verilog, PERL, TCL, C/C++ programming skills - Experience in System Verilog is a plus - Experience with VMM/OVM/UVM is a plus - Experience with ARM architecture is a plus - Must be able to multitask, self motivated, detail oriented - Must have an excellent communication and a team player Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-03-06 20:46:13United StatesBroadcomTexas18210BRTXAustin, TX26961384http://broadcom.jobs/xml/26961384/jobUSAAustinAuto req ID 18212BR Job Posting Title IC Design Verification for Mobile Platforms (all levels) Business Unit Mobile and Wireless Group Job Description Broadcom is developing the next generation handheld devices with integrated cellular phone, digital camera, video camcorder and television capability using Broadcom's family of mobile multimedia processors. Broadcom's mobile multimedia processors offer high-performance programmable multimedia capability with minimum power consumption and are designed to support the convergence of voice, video and data in handheld devices. Our design verification team supports multiple lines of products within the Mobile Platform Solutions Business Unit. Your responsibility will include: - Developing functional verification testplan - Developing verification environment and test suites for full chip and block level - Work closely with RTL designer as well as software and hardware engineers (such as FPGA team) to port test to/from other environment - Assist in functional test vector generation and bring up on ATE - Assist in silicon bring up - BSEE with 12+ years related experience, MSEE with 9+ years related experience, or PhD with 6+ years related experience - Experience in verifying designs at system and block level - Strong verilog, PERL, TCL, C/C++ programming skills - Experience in System Verilog is a plus - Experience with VMM/OVM/UVM is a plus - Experience with ARM architecture is a plus - Must be able to multitask, self motivated, detail oriented - Must have an excellent communication and a team player Job Requirements - BSEE with 12+ years related experience, MSEE with 9+ years related experience, or PhD with 6+ years related experience - Experience in verifying designs at system and block level - Strong verilog, PERL, TCL, C/C++ programming skills - Experience in System Verilog is a plus - Experience with VMM/OVM/UVM is a plus - Experience with ARM architecture is a plus - Must be able to multitask, self motivated, detail oriented - Must have an excellent communication and a team player Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-03-06 20:43:11United StatesBroadcomTexas18212BRTXAustin, TX26961269http://broadcom.jobs/xml/26961269/jobUSAAustinAuto req ID 18214BR Job Posting Title IC Design Verification (All Levels) Business Unit Mobile and Wireless Group Job Description Broadcom is developing the next generation handheld devices with integrated cellular phone, digital camera, video camcorder and television capability using Broadcom's family of mobile multimedia processors. Broadcom's mobile multimedia processors offer high-performance programmable multimedia capability with minimum power consumption and are designed to support the convergence of voice, video and data in handheld devices. In this role you will: - Develop functional test/verification plans for mobile multimedia SOC devices. - Develop a verification environment and self-checking test suites for full chip and block level. - Devices include such functionality as embedded ARM, video, and 3D rendering cores, wireless networking technologies, and assorted peripherals. - Responsible for ASIC test vectors generation and debugging. - Work with system and hardware engineers to port the tests to other environments (such as FPGA prototyping systems), silicon bring up and validation, etc. Job Requirements Typically requires a BS degree and 3 years of experience plus training or an MS degree plus required training. - Experience in SOC verification. - Experience in verifying designs from system and block level. - Experience with either ARM (preferred) or MIPS embedded architectures. - Strong Verilog/Vhdl, C/C++, Vera/Specman, PERL, TCL programming skills. - SystemC, System Verilog or assertion based verification background a plus. - Strong system and block level reference modeling skill. - Excellent communication and presentation skills. Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-03-06 20:42:57United StatesBroadcomTexas18214BRTXAustin, TX26961261http://broadcom.jobs/xml/26961261/jobUSAAustinAuto req ID 17243BR Job Posting Title Engineer, Principal - IC Design Business Unit Infrastructure and Networking Job Description This position is for DV of a very high end state of the art Optical Ethernet physical layer Serdes cores and other networking protocol cores. In this position you will contribute to • Play a lead role and be responsible for defining the verification strategy and plan for the development. • Develop and execute coverage-driven verification test plans. • Develop test suites for full chip and block level verification. • Develop System Verilog test bench environment. • Leverage your knowledge of constrained assertion based verification. • Manage the regressions and analyze functional and code coverage metrics to fill the coverage holes • Reviewing and critiquing of peers verification plan & env. • Develop a vector matching and/or co-simulation environment to verify between C/C++ models and RTL modules. • Add automation and scripting wherever applicable in the chip design flow • Proactively identifying new methodologies or tools to address an upcoming verification challenges Job Requirements • MSEE/BSEE with 10+ years in chip design verification. • Experience in verification lead position and be able to mentor highly qualified junior staff • Experience in planning the verification process and creating realistic schedule estimates • Experience in System Verilog. • Experience in scripting languages like PERL, TCL and C/C++ programming skills • Experience in developing coverage-driven verification test plans • Experience writing test specifications (plans) and creating directed and random test cases. • Experience in developing constrained random verification environment • Experience managing regression analysis • Experience in reviewing and critiquing of test bench and test plans • Strong debugging skills of Verilog RTL & test environment is desired • Able to adopt the use of new techniques and methodologies and promote their use within the project. • A high level of pro-activity, self-organized and problem solving. • Familiarity with assertion based verification is preferred • Verification experience in SERDES, Ethernet Networking in Verilog is a big plus. • Knowledge of IEEE 802.3 Physical layer clauses is a plus. Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2011-12-23 00:26:37United StatesBroadcomTexas17243BRTXAustin, TX25532612http://broadcom.jobs/xml/25532612/jobUSAAustinAuto req ID 14159BR Job Posting Title IC Design Verification Engineer - All Levels (Austin, TX) Business Unit Mobile and Wireless Group Job Description Our chip team designs giant mobile apps processor SOC's for smartphones, tablets, and the mobile computing market. In 2011, Broadcom became the 5th largest mobile apps processor vendor, surpassing Nvidia. We expect to continue that trend up the rankings with your help! http://www.eetimes.com/electronics-news/4231160/Broadcom-slips-into-top-5-in-smartphone-CPUs Our group contains engineers with all the skills required to design a chip from spec through tapeout and bring-up. Our group has a start-up's excitement to it, with the stability of a world leading semiconductor company. Our latest chip contains dual 1.2GHz ARM CPU's + world leading multimedia + cellular modem + a multitude of other blocks/interfaces. With our next chip, we are aiming for the high end of the market, so come join us, and work on a really exciting chip! We are currently hiring multiple ASIC design verification engineers. Strong domain knowledge in any of these areas is especially interesting to us: ARM CPU's and interconnect, multiprocessor computer architecture, low power verification, DDR, security, multimedia, audio, as well as various high speed peripherals. Job Duties Include: - Developing functional test/verification plans - Developing advanced full chip and block level verification environments and benches using the latest tools and methodologies (UVM for example) - Execute on test plans by writing block level and top level tests Job Requirements Positions available from Staff to Senior Principal Engineer level. Title will vary based upon candidate's experience and abilities, with a BS/MS + 3 years of experience as the minimum required. - Experience in verifying ASIC designs at chip level and block level - Strong Verilog, Perl, and C/C++ programming skills - System Verilog (UVM preferred or VMM/OVM) experience - Experience with assertion based verification - Reference modeling skills - ARM embedded programming skills a big plus - Experience using Palladium systems is a plus - Excellent communication and presentation skills - Well organized, methodical, and detail oriented - Must be a team player and easy to work with Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required None Function Engineering Discipline IC Design2011-06-06 20:05:49United StatesBroadcomTexas14159BRTXAustin, TX21658707http://broadcom.jobs/xml/21658707/jobUSAAustinAuto req ID 14162BR Job Posting Title IC Design Engineer - All Levels (Austin, TX) Business Unit Mobile and Wireless Group Job Description Our chip team designs giant mobile apps processor SOC's for smartphones, tablets, and the mobile computing market. In 2011, Broadcom became the 5th largest mobile apps processor vendor, surpassing Nvidia. We expect to continue that trend up the rankings with your help! http://www.eetimes.com/electronics-news/4231160/Broadcom-slips-into-top-5-in-smartphone-CPUs Our group contains engineers with all the skills required to design a chip from spec through tapeout and bring-up. Our group has a start-up's excitement to it, with the stability of a world leading semiconductor company. Our latest chip contains dual 1.2GHz ARM CPU's + world leading multimedia + cellular modem + a multitude of other blocks/interfaces. With our next chip, we are aiming for the high end of the market, so come join us, and work on a really exciting chip! We are currently hiring multiple ASIC front end design engineers. Strong domain knowledge in any of these areas is especially interesting to us: ARM CPU's and interconnect, multiprocessor computer architecture, low power design, DDR, security, multimedia, audio, as well as various high speed peripherals. Job Duties Include: - RTL Design (both from scratch, as well as integration) - Writing specifications for blocks - Working closely with DV engineers on the testing and debugging of your blocks - Designers often help out in other skill areas later in projects, so DV and/or implementation skills are a big plus Job Requirements Positions available from Staff to Senior Principal Engineer level. Title will vary based upon candidate's experience and abilities, with a BS/MS + 3 years of experience as the minimum required. - Extensive ASIC RTL design experience in Verilog - Technical knowledge in one of the domain areas mentioned above - Previous high end apps processor design experience a big plus - Excellent communication skills - Bright, well organized, methodical, team player, and detail oriented Country United States State/Province Texas City/Town Austin Shift 1st Shift - Day Percent of Travel Required None Function Engineering Discipline IC Design2011-05-12 21:33:56United StatesBroadcomTexas14162BRTXAustin, TX21223349http://broadcom.jobs/xml/21223349/job