Auto req ID 17325BR
Job Posting Title Associate Technical Director
Business Unit Mobile and Wireless Group
Job Description Associate Technical Director Job Description Job Description – Summarize the overall purpose and objectives of the job
Associate Technical Director
Architect and Design 4G (LTE) / 3G / 2G multimode mobile broadband wireless ASIC’s and provide technical leadership.
Essential Functions – List the principle tasks, duties and responsibilities; use specific job-related key words.
Will be responsible for working with System Architects, Software Engineers, External IP providers and ASIC Managers to define Functional specifications, Architecture and Micro-architecture of key SoC blocks and will be responsible for technically leading design teams that implement the SoC blocks.
Integrate Analog – Mixed Signal blocks like AFE and high speed Phy’s in to the SoC.
Work with external IP vendors to continuously monitor the quality of their deliverables.
Logic design and verification of key SoC blocks.
Closely work with the Physical Design team for floor planning and timing closure.
Define the test methodology for SoC blocks.
Post Silicon debug support of the design on both ATE and lab environments.
Excellent micro-architecture, Logic design and verification skills.
Ability to implement complex DSP algorithms in hardware.
Proficiency with RTL coding using HDL language(s). Knowledge of Verilog preferred.
Familiarity with logic simulation and debug environments.
Knowledge of Synthesis, STA and DFT
Experience with Post Silicon validation
Strong communication, analytical and documentation skills
B.Tech 15+ years or above
Job Requirements Associate Technical Director Job Description Job Description – Summarize the overall purpose and objectives of the job
Associate Technical Director
Architect and Design 4G (LTE) / 3G / 2G multimode mobile broadband wireless ASIC’s and lead a team of Engineers.
Essential Functions – List the principle tasks, duties and responsibilities; use specific job-related key words.
Will be responsible for working with System Architects, Software Engineers, External IP providers and ASIC Managers to define Functional specifications, Architecture and Micro-architecture of key SoC blocks and will be responsible for technically leading design teams that implement the SoC blocks.
Integrate Analog – Mixed Signal blocks like AFE and high speed Phy’s in to the SoC.
Work with external IP vendors to continuously monitor the quality of their deliverables.
Logic design and verification of key SoC blocks.
Closely work with the Physical Design team for floor planning and timing closure.
Define the test methodology for SoC blocks.
Post Silicon debug support of the design on both ATE and lab environments.
Excellent micro-architecture, Logic design and verification skills.
Ability to implement complex DSP algorithms in hardware.
Proficiency with RTL coding using HDL language(s). Knowledge of Verilog preferred.
Familiarity with logic simulation and debug environments.
Knowledge of Synthesis, STA and DFT
Experience with Post Silicon validation
Strong communication, analytical and documentation skills
B.Tech 15+ years or above
Country India
State/Province India Cities
City/Town Bangalore
Shift 1st Shift - Day
Percent of Travel Required 5% - 10%
Function Engineering
Discipline IC Design
