[{"country_short": "USA", "city": "Andover", "description": "Auto req ID 19466BR\nJob Posting Title Engineer, Staff - IC Design\nBusiness Unit Infrastructure and Networking\nJob Description The Network Switch Division of Broadcom Corporation is well known in the networking industry for providing a wide range of world class XGS Ethernet network switching / routing chips. Our products include cutting edge 10/100Mbps, 1Gbps, 2.5Gbps, 10Gbps, 40Gbps, 100Gbps switches and fabrics that serves small to medium business, Enterprise and chassis market spaces.\n\nAs a junior level member of staff at Broadcom Corporation, the responsibilities include\n\n-- participate in early reviews of product definition and architecture development of our switches.\n-- fully understand architecture, microarchitecture for new design\n-- develop verification testplan for new design, build test bench, checkers, models, tests\n-- interact with design team\n-- perform rtl code coverage\n-- document and review detail testplans, testbench and close verification signoff items\n-- support post silicon activities\nJob Requirements - BS/MS degree in EE or CS with 5+ years of working experience in Verification. - Must have knowledge and experience of ASIC design verification flows and methodologies. - Good Knowledge in languages relevant to the ASIC verification process including Verilog, SystemVerilog, VERA, Unix Scripting, and C. - Self-motivated, excellent communication skills and ability to excel in a team environment. - Experience in the Ethernet Network Switch/Fabric field is a plus.\nCountry United States\nState/Province Massachusetts\nCity/Town Andover\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-05-17 18:24:30", "url": "http://broadcom.jobs/xml/28762818/job", "country": "United States", "company": "Broadcom", "title": "Engineer, Staff - IC Design", "reqid": "19466BR", "state": "Massachusetts", "state_short": "MA", "location": "Andover, MA", "uid": 28762818}, {"country_short": "USA", "city": "Andover", "description": "Auto req ID 19058BR\nJob Posting Title Senior Design Verification Engineer\nBusiness Unit Broadband Communications\nJob Description In this role you will verify the physical layer for high speed DDR memory interfaces for next generation Broadcom products. The candidate should have a strong software-centric verification background and experience developing in Verilog/C/C++ based environments, test benches, verification plans, and verification tests. The candidate should have a good working knowledge of high-speed chip design. Knowledge of ASIC design flows and experience with DDR interfaces and DRAM technology is desirable. The candidate should be highly motivated and possess a strong team work ethic.\nEssential Duties and Responsibilities Include:\n\u2022 Implementing and maintaining Verilog/C/C++ testbenches and verification environments.\n\u2022 Writing and executing RTL verification plans.\n\u2022 Developing DDR controller/PHY initialization and test software.\n\u2022 Gate level simulation.\n\u2022 Supporting silicon bring up in lab.\n\u2022 Supporting internal and external memory controller/PHY customers.\nJob Requirements \u2022 Must be fluent in C/C++ and have strong code debugging skills.\n\u2022 Working knowledge of Verilog & Digital design is a must.\n\u2022 Experience designing or verifying DDR2/3 memory controllers and PHYs highly desirable.\n\u2022 Strong scripting skills; Perl expertise highly desirable.\n\u2022 System Verilog and DPI experience desirable.\n\u2022 Good communication skills.\n\u2022 MSEE/MSCS or BSEE/BSCS and 3 years of experience.\nCountry United States\nState/Province Massachusetts\nCity/Town Andover\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-05-17 18:24:19", "url": "http://broadcom.jobs/xml/28762815/job", "country": "United States", "company": "Broadcom", "title": "Senior Design Verification Engineer", "reqid": "19058BR", "state": "Massachusetts", "state_short": "MA", "location": "Andover, MA", "uid": 28762815}, {"country_short": "USA", "city": "Andover", "description": "Auto req ID 19467BR\nJob Posting Title Engineer, Staff - IC Design\nBusiness Unit Infrastructure and Networking\nJob Description The Network Switch Division of Broadcom Corporation is well known in the networking industry for providing a wide range of world class XGS Ethernet network switching / routing chips. Our products include cutting edge 10/100Mbps, 1Gbps, 2.5Gbps, 10Gbps, 40Gbps, 100Gbps switches and fabrics that serves small to medium business, Enterprise and chassis market spaces.\n\nAs a junior level member of staff at Broadcom Corporation, the responsibilities include\n\n-- participate in early reviews of product definition and architecture development of our switches.\n-- fully understand architecture, microarchitecture for new design\n-- develop verification testplan for new design, build test bench, checkers, models, tests\n-- interact with design team\n-- perform rtl code coverage\n-- document and review detail testplans, testbench and close verification signoff items\n-- support post silicon activities\nJob Requirements - BS/MS degree in EE or CS with 5+ years of working experience in Verification. - Must have knowledge and experience of ASIC design verification flows and methodologies. - Good Knowledge in languages relevant to the ASIC verification process including Verilog, SystemVerilog, VERA, Unix Scripting, and C. - Self-motivated, excellent communication skills and ability to excel in a team environment. - Experience in the Ethernet Network Switch/Fabric field is a plus.\nCountry United States\nState/Province Massachusetts\nCity/Town Andover\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-05-17 18:22:53", "url": "http://broadcom.jobs/xml/28762778/job", "country": "United States", "company": "Broadcom", "title": "Engineer, Staff - IC Design", "reqid": "19467BR", "state": "Massachusetts", "state_short": "MA", "location": "Andover, MA", "uid": 28762778}, {"country_short": "USA", "city": "Andover", "description": "Auto req ID 19057BR\nJob Posting Title Memory Subsystem Firmware Engineer\nBusiness Unit Broadband Communications\nJob Description In this role, you will join Broadcom's Broadband Communications Group (BCG), a world-class team responsible for designing and supporting some of the coolest products in millions of homes and businesses around the world. We enable residential broadband services, cable, satellite, and IP set-top boxes. BCG prides itself on being the dominant player, both in emerging and developed markets. If you have a passion for advancing technology and an insatiable desire to win, we encourage you to apply for these exciting opportunities. The engineer in this position will join a team of highly competent firmware developers involved in the design, implementation and verification of firmware and software for the DRAM memory subsystem. The successful candidate will design, implement and support memory controller and DDR PHY interface firmware modules as well as calibration and diagnostics software. To succeed in this role, you must be a knowledgeable embedded engineer with excellent teamwork and problem solving skills.\n\nEssential Duties and Responsibilities Include:\n\u2022 Designing, implementing and maintaining C/C++/ASM firmware and diagnostic tools for the DRAM memory subsystem\n\u2022 Supporting DRAM memory subsystem experiments via implementation of test firmware.\n\u2022 Developing scripts for firmware configuration management and automated regressions.\n\u2022 Supporting firmware QA cycles in lab.\n\u2022 Supporting internal and external firmware customers.\nJob Requirements \u2022 Deep knowledge of embedded firmware design\n\u2022 Proficient in C/C++ programming\n\u2022 Proficient in assembly language (MIPS and ARM preferred; Nios, MicroBlaze, x86 or any other popular 32-bit CPU a plus)\n\u2022 Scripting language knowledge is a plus\n\u2022 Familiarity with DRAM technology is required\n\u2022 Excellent hands-on skills in the lab\n\u2022 Experience with ARM and MIPS tools is a plus\n\u2022 Strong communication, self motivated and the ability to drive designs from specification to completion.\n\u2022 Demonstrated ability to diagnose complex system problems and develop innovative solutions\n\u2022 Experience with developing and debugging embedded firmware in complex systems-on-chip projects\n\u2022 BSCS or BSEE or equivalent required, MSEE is a plus, with at least 8 years of related experience\nCountry United States\nState/Province Massachusetts\nCity/Town Andover\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline Firmware", "date_new": "2012-05-17 18:22:01", "url": "http://broadcom.jobs/xml/28762747/job", "country": "United States", "company": "Broadcom", "title": "Memory Subsystem Firmware Engineer", "reqid": "19057BR", "state": "Massachusetts", "state_short": "MA", "location": "Andover, MA", "uid": 28762747}, {"country_short": "USA", "city": "Andover", "description": "Auto req ID 19055BR\nJob Posting Title DDR PHY Design Engineer\nBusiness Unit Broadband Communications\nJob Description In this role you will implement, model and verify a high speed DDR physical layer interface for our next generation products. The candidate must have strong knowledge of high-speed chip design in both digital logic and circuit aspects. The candidate is ideally an expert in the DDR interface and DRAM technology and has demonstrated experience on DDR3 starting from definition to successful silicon characterization and production. Must have good knowledge and experience working with verification test benches and working collaboratively to verify correct logical functionality. Having knowledge of high speed SERDES, PLL, high speed IO, and packaging is a BIG plus. Needs good understanding of power distribution issues in I/O designs, integration & internal/external timing closure using static timing analysis tools and SPICE. Knowledge of ASIC design flows is a plus. The candidate should possess high motivation & good team work.\n\nEssential Duties and Responsibilities Include:\n\u2022 Defining the architecture of the physical layer & publish the micro-architecture specifications.\n\u2022 Developing RTL for a DDR PHY.\n\u2022 Planning the physical architecture of the PHY.\nJob Requirements Required:\n\u2022 Extensive digital design verification experience including test environment construction and test plan development\n\u2022 Experience with various RTL simulators and waveform viewers\n\u2022 Verilog, C/C++, and Perl programming skills\n\u2022 Good communication skills\n\u2022 The minimum job requirement for this position is BSEE and 5+ years of experience\n\u2022 Candidate must be a self-starter and able to work independently\n\nRecommended:\n\u2022 ASIC RTL design experience\n\u2022 Experience with lint and equivalency checking tools\n\u2022 Emulation experience\n\u2022 Experience with large SOC designs and especially those including embedded processors\n\u2022 Familiarity with latest DDR DRAM standards\nCountry United States\nState/Province Massachusetts\nCity/Town Andover\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-05-17 18:21:22", "url": "http://broadcom.jobs/xml/28762677/job", "country": "United States", "company": "Broadcom", "title": "DDR PHY Design Engineer", "reqid": "19055BR", "state": "Massachusetts", "state_short": "MA", "location": "Andover, MA", "uid": 28762677}, {"country_short": "USA", "city": "Andover", "description": "Auto req ID 18982BR\nJob Posting Title Intern\nBusiness Unit Infrastructure and Networking\nJob Description MSEE intern to work in the high-speed, digital design, signal integrity\nteam that supports both the IC and System design teams at Broadcom Andover.\nIntern will perform simulations and measurements for various timing, power,\nsignal fidelity and noise analyses.\n\nMust have an understanding of some the following disciplines:\n- Analog circuit design (BSEE required)\n- Digital logic design including sequential element timing (e.g. setup and hold)\n- Logic family noise margins (e.g CMOS INV xfer curve: Vil, Vih, Vol, Voh)\n- SPICE (required)\n- Differential signaling\n- VLSI design course work and projects\n- Computer Architecture and IO interfaces (e.g. DDR, USB)\n- Transmission Lines (e.g. ElectroMagnetics)\n- Signals and Systems (especially time domain and freq domain conversions)\n- Lab test equipment (e.g. oscilliscopes, voltage and frequency sources, etc)\n- Lab testing/characterization of SMT High Speed Digital ICs\n- Programing Languages (C, PERL, Matlab)\n- EDA SW (SPICE, MatLab, HyperLynx, PCB schematic, PCB layout)\nJob Requirements - Analog circuit design (BSEE required)\n- Digital logic design including sequential element timing (e.g. setup and hold)\n- Logic family noise margins (e.g CMOS INV xfer curve: Vil, Vih, Vol, Voh)\n- SPICE (required)\n- Differential signaling\n- VLSI design course work and projects\n- Computer Architecture and IO interfaces (e.g. DDR, USB)\n- Transmission Lines (e.g. ElectroMagnetics)\n- Signals and Systems (especially time domain and freq domain conversions)\n- Lab test equipment (e.g. oscilliscopes, voltage and frequency sources, etc)\n- Lab testing/characterization of SMT High Speed Digital ICs\n- Programing Languages (C, PERL, Matlab)\n- EDA SW (SPICE, MatLab, HyperLynx, PCB schematic, PCB layout)\nCountry United States\nState/Province Massachusetts\nCity/Town Andover\nShift 1st Shift - Day\nPercent of Travel Required None\nFunction Engineering\nDiscipline Intern", "date_new": "2012-04-13 19:27:25", "url": "http://broadcom.jobs/xml/27882130/job", "country": "United States", "company": "Broadcom", "title": "Intern", "reqid": "18982BR", "state": "Massachusetts", "state_short": "MA", "location": "Andover, MA", "uid": 27882130}, {"country_short": "USA", "city": "Andover", "description": "Auto req ID 18906BR\nJob Posting Title Principal Design Verification Engineer\nBusiness Unit Broadband Communications\nJob Description Join Broadcom's Broadband Communications Group (BCG), a world-class team responsible for designing and supporting some of the coolest products in millions of homes and businesses around the world. We enable residential broadband services, cable, satellite, and IP set-top boxes. BCG prides itself on being the dominant player, both in emerging and developed markets. If you have a passion for advancing technology and an insatiable desire to win, we encourage you to apply for these exciting opportunities.\nIn this role you will contribute to the verification of a leading edge memory controller core design. You will utilize innovative techniques to generate test environments and employ simulation and emulation to validate the designs. You will utilize scripting to automate testing processes. You will also be expected to support the design/verification flow through the ASIC integration and back end process.\nJob Requirements Required:\n\u2022 Extensive digital design verification experience including test environment construction and test plan development\n\u2022 Experience with various RTL simulators and waveform viewers\n\u2022 Verilog, C/C++, and Perl programming skills\n\u2022 Good communication skills\n\u2022 The minimum job requirement for this position is BSEE and 5+ years of experience\n\u2022 Candidate must be a self-starter and able to work independently\n\nRecommended:\n\u2022 ASIC RTL design experience\n\u2022 Experience with lint and equivalency checking tools\n\u2022 Emulation experience\n\u2022 Experience with large SOC designs and especially those including embedded processors\n\u2022 Familiarity with latest DDR DRAM standards\nCountry United States\nState/Province Massachusetts\nCity/Town Andover\nShift 1st Shift - Day\nPercent of Travel Required 5% - 10%\nFunction Engineering\nDiscipline IC Design", "date_new": "2012-04-11 04:48:36", "url": "http://broadcom.jobs/xml/27805964/job", "country": "United States", "company": "Broadcom", "title": "Principal Design Verification Engineer", "reqid": "18906BR", "state": "Massachusetts", "state_short": "MA", "location": "Andover, MA", "uid": 27805964}]