Broadcom Jobshttp://broadcom.jobs2012-05-23 22:11:51.367458USAAndoverAuto req ID 19466BR Job Posting Title Engineer, Staff - IC Design Business Unit Infrastructure and Networking Job Description The Network Switch Division of Broadcom Corporation is well known in the networking industry for providing a wide range of world class XGS Ethernet network switching / routing chips. Our products include cutting edge 10/100Mbps, 1Gbps, 2.5Gbps, 10Gbps, 40Gbps, 100Gbps switches and fabrics that serves small to medium business, Enterprise and chassis market spaces. As a junior level member of staff at Broadcom Corporation, the responsibilities include -- participate in early reviews of product definition and architecture development of our switches. -- fully understand architecture, microarchitecture for new design -- develop verification testplan for new design, build test bench, checkers, models, tests -- interact with design team -- perform rtl code coverage -- document and review detail testplans, testbench and close verification signoff items -- support post silicon activities Job Requirements - BS/MS degree in EE or CS with 5+ years of working experience in Verification. - Must have knowledge and experience of ASIC design verification flows and methodologies. - Good Knowledge in languages relevant to the ASIC verification process including Verilog, SystemVerilog, VERA, Unix Scripting, and C. - Self-motivated, excellent communication skills and ability to excel in a team environment. - Experience in the Ethernet Network Switch/Fabric field is a plus. Country United States State/Province Massachusetts City/Town Andover Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-05-17 18:24:30United StatesBroadcomMassachusetts19466BRMAAndover, MA28762818http://broadcom.jobs/xml/28762818/jobUSAAndoverAuto req ID 19058BR Job Posting Title Senior Design Verification Engineer Business Unit Broadband Communications Job Description In this role you will verify the physical layer for high speed DDR memory interfaces for next generation Broadcom products. The candidate should have a strong software-centric verification background and experience developing in Verilog/C/C++ based environments, test benches, verification plans, and verification tests. The candidate should have a good working knowledge of high-speed chip design. Knowledge of ASIC design flows and experience with DDR interfaces and DRAM technology is desirable. The candidate should be highly motivated and possess a strong team work ethic. Essential Duties and Responsibilities Include: • Implementing and maintaining Verilog/C/C++ testbenches and verification environments. • Writing and executing RTL verification plans. • Developing DDR controller/PHY initialization and test software. • Gate level simulation. • Supporting silicon bring up in lab. • Supporting internal and external memory controller/PHY customers. Job Requirements • Must be fluent in C/C++ and have strong code debugging skills. • Working knowledge of Verilog & Digital design is a must. • Experience designing or verifying DDR2/3 memory controllers and PHYs highly desirable. • Strong scripting skills; Perl expertise highly desirable. • System Verilog and DPI experience desirable. • Good communication skills. • MSEE/MSCS or BSEE/BSCS and 3 years of experience. Country United States State/Province Massachusetts City/Town Andover Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-05-17 18:24:19United StatesBroadcomMassachusetts19058BRMAAndover, MA28762815http://broadcom.jobs/xml/28762815/jobUSAAndoverAuto req ID 19467BR Job Posting Title Engineer, Staff - IC Design Business Unit Infrastructure and Networking Job Description The Network Switch Division of Broadcom Corporation is well known in the networking industry for providing a wide range of world class XGS Ethernet network switching / routing chips. Our products include cutting edge 10/100Mbps, 1Gbps, 2.5Gbps, 10Gbps, 40Gbps, 100Gbps switches and fabrics that serves small to medium business, Enterprise and chassis market spaces. As a junior level member of staff at Broadcom Corporation, the responsibilities include -- participate in early reviews of product definition and architecture development of our switches. -- fully understand architecture, microarchitecture for new design -- develop verification testplan for new design, build test bench, checkers, models, tests -- interact with design team -- perform rtl code coverage -- document and review detail testplans, testbench and close verification signoff items -- support post silicon activities Job Requirements - BS/MS degree in EE or CS with 5+ years of working experience in Verification. - Must have knowledge and experience of ASIC design verification flows and methodologies. - Good Knowledge in languages relevant to the ASIC verification process including Verilog, SystemVerilog, VERA, Unix Scripting, and C. - Self-motivated, excellent communication skills and ability to excel in a team environment. - Experience in the Ethernet Network Switch/Fabric field is a plus. Country United States State/Province Massachusetts City/Town Andover Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-05-17 18:22:53United StatesBroadcomMassachusetts19467BRMAAndover, MA28762778http://broadcom.jobs/xml/28762778/jobUSAAndoverAuto req ID 19057BR Job Posting Title Memory Subsystem Firmware Engineer Business Unit Broadband Communications Job Description In this role, you will join Broadcom's Broadband Communications Group (BCG), a world-class team responsible for designing and supporting some of the coolest products in millions of homes and businesses around the world. We enable residential broadband services, cable, satellite, and IP set-top boxes. BCG prides itself on being the dominant player, both in emerging and developed markets. If you have a passion for advancing technology and an insatiable desire to win, we encourage you to apply for these exciting opportunities. The engineer in this position will join a team of highly competent firmware developers involved in the design, implementation and verification of firmware and software for the DRAM memory subsystem. The successful candidate will design, implement and support memory controller and DDR PHY interface firmware modules as well as calibration and diagnostics software. To succeed in this role, you must be a knowledgeable embedded engineer with excellent teamwork and problem solving skills. Essential Duties and Responsibilities Include: • Designing, implementing and maintaining C/C++/ASM firmware and diagnostic tools for the DRAM memory subsystem • Supporting DRAM memory subsystem experiments via implementation of test firmware. • Developing scripts for firmware configuration management and automated regressions. • Supporting firmware QA cycles in lab. • Supporting internal and external firmware customers. Job Requirements • Deep knowledge of embedded firmware design • Proficient in C/C++ programming • Proficient in assembly language (MIPS and ARM preferred; Nios, MicroBlaze, x86 or any other popular 32-bit CPU a plus) • Scripting language knowledge is a plus • Familiarity with DRAM technology is required • Excellent hands-on skills in the lab • Experience with ARM and MIPS tools is a plus • Strong communication, self motivated and the ability to drive designs from specification to completion. • Demonstrated ability to diagnose complex system problems and develop innovative solutions • Experience with developing and debugging embedded firmware in complex systems-on-chip projects • BSCS or BSEE or equivalent required, MSEE is a plus, with at least 8 years of related experience Country United States State/Province Massachusetts City/Town Andover Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline Firmware2012-05-17 18:22:01United StatesBroadcomMassachusetts19057BRMAAndover, MA28762747http://broadcom.jobs/xml/28762747/jobUSAAndoverAuto req ID 19055BR Job Posting Title DDR PHY Design Engineer Business Unit Broadband Communications Job Description In this role you will implement, model and verify a high speed DDR physical layer interface for our next generation products. The candidate must have strong knowledge of high-speed chip design in both digital logic and circuit aspects. The candidate is ideally an expert in the DDR interface and DRAM technology and has demonstrated experience on DDR3 starting from definition to successful silicon characterization and production. Must have good knowledge and experience working with verification test benches and working collaboratively to verify correct logical functionality. Having knowledge of high speed SERDES, PLL, high speed IO, and packaging is a BIG plus. Needs good understanding of power distribution issues in I/O designs, integration & internal/external timing closure using static timing analysis tools and SPICE. Knowledge of ASIC design flows is a plus. The candidate should possess high motivation & good team work. Essential Duties and Responsibilities Include: • Defining the architecture of the physical layer & publish the micro-architecture specifications. • Developing RTL for a DDR PHY. • Planning the physical architecture of the PHY. Job Requirements Required: • Extensive digital design verification experience including test environment construction and test plan development • Experience with various RTL simulators and waveform viewers • Verilog, C/C++, and Perl programming skills • Good communication skills • The minimum job requirement for this position is BSEE and 5+ years of experience • Candidate must be a self-starter and able to work independently Recommended: • ASIC RTL design experience • Experience with lint and equivalency checking tools • Emulation experience • Experience with large SOC designs and especially those including embedded processors • Familiarity with latest DDR DRAM standards Country United States State/Province Massachusetts City/Town Andover Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-05-17 18:21:22United StatesBroadcomMassachusetts19055BRMAAndover, MA28762677http://broadcom.jobs/xml/28762677/jobUSAAndoverAuto req ID 18982BR Job Posting Title Intern Business Unit Infrastructure and Networking Job Description MSEE intern to work in the high-speed, digital design, signal integrity team that supports both the IC and System design teams at Broadcom Andover. Intern will perform simulations and measurements for various timing, power, signal fidelity and noise analyses. Must have an understanding of some the following disciplines: - Analog circuit design (BSEE required) - Digital logic design including sequential element timing (e.g. setup and hold) - Logic family noise margins (e.g CMOS INV xfer curve: Vil, Vih, Vol, Voh) - SPICE (required) - Differential signaling - VLSI design course work and projects - Computer Architecture and IO interfaces (e.g. DDR, USB) - Transmission Lines (e.g. ElectroMagnetics) - Signals and Systems (especially time domain and freq domain conversions) - Lab test equipment (e.g. oscilliscopes, voltage and frequency sources, etc) - Lab testing/characterization of SMT High Speed Digital ICs - Programing Languages (C, PERL, Matlab) - EDA SW (SPICE, MatLab, HyperLynx, PCB schematic, PCB layout) Job Requirements - Analog circuit design (BSEE required) - Digital logic design including sequential element timing (e.g. setup and hold) - Logic family noise margins (e.g CMOS INV xfer curve: Vil, Vih, Vol, Voh) - SPICE (required) - Differential signaling - VLSI design course work and projects - Computer Architecture and IO interfaces (e.g. DDR, USB) - Transmission Lines (e.g. ElectroMagnetics) - Signals and Systems (especially time domain and freq domain conversions) - Lab test equipment (e.g. oscilliscopes, voltage and frequency sources, etc) - Lab testing/characterization of SMT High Speed Digital ICs - Programing Languages (C, PERL, Matlab) - EDA SW (SPICE, MatLab, HyperLynx, PCB schematic, PCB layout) Country United States State/Province Massachusetts City/Town Andover Shift 1st Shift - Day Percent of Travel Required None Function Engineering Discipline Intern2012-04-13 19:27:25United StatesBroadcomMassachusetts18982BRMAAndover, MA27882130http://broadcom.jobs/xml/27882130/jobUSAAndoverAuto req ID 18906BR Job Posting Title Principal Design Verification Engineer Business Unit Broadband Communications Job Description Join Broadcom's Broadband Communications Group (BCG), a world-class team responsible for designing and supporting some of the coolest products in millions of homes and businesses around the world. We enable residential broadband services, cable, satellite, and IP set-top boxes. BCG prides itself on being the dominant player, both in emerging and developed markets. If you have a passion for advancing technology and an insatiable desire to win, we encourage you to apply for these exciting opportunities. In this role you will contribute to the verification of a leading edge memory controller core design. You will utilize innovative techniques to generate test environments and employ simulation and emulation to validate the designs. You will utilize scripting to automate testing processes. You will also be expected to support the design/verification flow through the ASIC integration and back end process. Job Requirements Required: • Extensive digital design verification experience including test environment construction and test plan development • Experience with various RTL simulators and waveform viewers • Verilog, C/C++, and Perl programming skills • Good communication skills • The minimum job requirement for this position is BSEE and 5+ years of experience • Candidate must be a self-starter and able to work independently Recommended: • ASIC RTL design experience • Experience with lint and equivalency checking tools • Emulation experience • Experience with large SOC designs and especially those including embedded processors • Familiarity with latest DDR DRAM standards Country United States State/Province Massachusetts City/Town Andover Shift 1st Shift - Day Percent of Travel Required 5% - 10% Function Engineering Discipline IC Design2012-04-11 04:48:36United StatesBroadcomMassachusetts18906BRMAAndover, MA27805964http://broadcom.jobs/xml/27805964/job