Auto req ID 17948BR
Job Posting Title Engineer, Sr Staff - IC Design - Israel
Business Unit Infrastructure and Networking
Job Description Part of a young, dynamic, open-minded verification team, which is responsible for verification of complex, state of the art networking ASIC designs.
As part of the verification effort, new and advanced re-use and development methodologies are used.
Verification includes full verification flow from block-level verification to sub-chip and full-chip simulation environments.
As part of the job, the candidate will assume vast technical responsibilities, such as:
• Complex block-level and/or sub-system benches ownership, including bench architecture and development.
• Take active role in adding / shaping DV methodologies and flows
Job Requirements • Must have an engineering degree in EE/CS from a well-known university (Technion, Tel Aviv, Ben Gurion …) with high GPA.
• Must have experience of at least 3 years in ASIC Verification.
• Must have good knowledge in Verilog HDL
• Must have deep knowledge in one or more of the following HVL (Hardware Verification Languages): Specman (preferred), SystemVerilog
• Must have experience with relevant VLSI design and verification tools: Simulation (NCVerilog, VCS…), advanced verification tools (Code coverage tools, functional-coverage, EManager …), waveform viewers’ tools (Verdi/Debussy, Virsim, SimVision…)
• Must have experience with advanced verification methodologies (constraint random, coverage oriented, verification reuse) as eRM, VMM, OVM, UVM.
• Must have vast experience with complete process of complex IC verification cycle
• Experience with scripts tools as Perl and TCL – advantage.
• Knowledge in networking (TCP/IP), and networking chips is an advantage
• Must have excellent communication skills in English (written and verbal) and good interpersonal skills (initiative, leader, open minded)
Country Israel
State/Province Israel Cities
City/Town Ramat Gan
Shift 1st Shift - Day
Percent of Travel Required None
Function Engineering
Discipline IC Design
